The present invention relates to devices wherein the electrical conductivity of the device can be reversibly changed in response to an electrical voltage applied over the device. In particular the invention relates to memory devices comprising organometallic materials as resistive switching material.
The evolution of the market of data storage memories indicates a growing need for ever-larger capacity ranging from gigabytes to hundreds of gigabytes or even to Terabytes. This evolution is driven, amongst others, by new data consuming applications such as multimedia and gaming. The Flash memory technology, wherein the shift in threshold voltage of a field effect transistor is indicative of the bit status, has so far been able to fulfill this scaling requirement, keeping a reasonable cost per bit. However it is expected that Flash memory technology will face severe scaling problems beyond the 45 nm technology node due to fundamental physical limitations.
Resistive switching memories constitute replacement candidates, as their physical switching mechanisms may not degrade with scaling. This type of memories comprises a resistor element that can be reversibly programmed in a high and low conductive state. Various materials such as transition metal oxides, organic semiconductors or organometallic semiconductors can be used to manufacture such resistor element.
Resistive switching memories are being integrated using structures derived from the 1T/1C (one transistor/one capacitor) concept as used in dynamic RAM. The resistor element, comprising the resistive switching material, is stacked on top of a MOS transistor and accessed through the bit-line. The resistor element is placed between metal lines, typically within the back-end-of-line (BEOL) section of the integrated circuit.
Chen et al. also discloses in “Non-Volatile Resistive Switching for Advanced Memory Applications”, IEDM 2005, Washington D.C., 5-7 Dec. 2005, a memory array using CuxO as resistive switching material in the resistor elements. The copper oxide is grown from the top of the copper plugs onwards which are used as bottom electrode. The stack of the copper oxide and the top-electrode contact (TE) layer needs to be patterned after forming both layers. As etching may damage the active area of the resistor element, an overlap between the MRM element and the copper plug is needed. This overlap will impact the scaling potential of this concept.
R. Müller et al discloses in “Organic CuTCNQ non-volatile memories for integration in the CMOS backend-of-line: preparation from gas/solid reaction and downscaling to an area of 0.25 um2”, Solid-State Electronics 50 (2006) 601-605, a method for manufacturing a CuTCNQ film by corrosion of a Cu substrate by TCNQ vapor a reduced pressure. The process flow established by Müller et al consists of first forming copper islands on an oxide layer. These copper islands will be used as bottom electrode and as starting material for the growth of CuTCNQ. A CuTCNQ film is then formed on the exposed surfaces of these copper islands. Alternatively the copper CuTCNQ was grown on top of Cu filled via's. Finally a top electrode is formed by depositing an alumina layer overlying the copper pattern. This method is applicable to form a cross-bar memory array wherein copper bottom electrodes and alumina top electrodes are formed as parallel lines running in perpendicular directions. Each overlap between a top and bottom electrode constitutes a memory element as here between both electrodes a voltage can be applied over the CuTCNQ film. Although the process flow presented by Müller et al is made compatible with CMOS backend-of-line processing, the resistor element formed suffers from the fact that the resistive switching layer is formed in an uncontrolled way. The author tried to limit the growth of the CuTNCQ by decreasing the reaction time and temperature, but in vain.
If the growth of the resistive switching material can not be adequately controlled over the whole substrate, then the thickness of the resistive switching layer will vary from one resistor element to another.
Hence there is a need for a method to form a resistor element comprising a resistive switching layer, in particular an organic or organometallic semiconductor, which method does not suffer from the shortcomings of the prior art.
There is a need for a method to form a resistor element comprising an organic or organometallic semiconductor as resistive switching layer allowing controlled formation of the resistive switching layer in a CMOS compatible process flow.
There is a need for a method to form a resistor element comprising an organic or organometallic semiconductor as resistive switching layer whereby the metal of the bottom electrode and the metal for forming the resistive switching material can be different.
There is a need for a method to form a resistor element comprising a resistive switching layer, in particular an organic or organometallic semiconductor, which method allows further scaling of the resistor array.
There is also a need for a method to form a resistor element comprising a resistive switching layer, in particular an organic or organometallic semiconductor, which method allows the integration of the resistor array with means for selecting individual resistor elements and with peripheral electronic circuitry for operating the resistor array.